1. Field of the Invention
This invention presents novel processing techniques to overcome lithography issues on extreme topography, particularly, in applications including the fabrication of micromachined structures such as those traditionally characterized as microelectro-mechanical structures (MEMS), including chemical sensors, pressure and temperature sensors, shock sensors, and silicon optical benches, etc.
2. Description of the Prior Art
MEMs devices typically merge the fields of macrodevices produced by conventional mechanical machining and electronics design with the field of microfabrication, similar to those used in semiconductor processing. MEMs devices, typically characterized as devices ranging from a few microns to several mils in size, are fabricated using semiconductor technology, but with larger ground rules. Dimensions are typically larger in width and length, but also 10× to 100× greater in height. The primary challenge associated with fabricating MEMs devices, therefore, is photolithography, where a non-planar surface is known to be problematic. A complete MEMs device typically will require several levels of lithography. These multi-level structures inherently result in surfaces with topography, originating from wet chemical etching, reactive ion etching, and metal deposition to name a few. Topography may range from a few microns to hundreds of microns. This topography hampers the ability to produce fine lines as the photoresist has to be made quite thick, approximately equal to the topography of the device, in order to get continuous coverage over the topography.
Anisotropically etched silicon cavities produce cavities with edges with abrupt, sharp interfaces at the wafer surface, making use of conventional spin coated photoresists difficult. As shown in FIG. 1, liquid resist coatings 18 on deep cavities, such as anisotropically etched cavities 12 and 15 formed in substrate 10 such and ranging from about several microns to several mils in depth, results in cavity bottoms coated (3× to 10×) thicker than the majority of the surface of the wafer. Second, resist coatings are much thinner (0× to 0.1×) at the rim of a cavity than on the majority of the surface of the wafer, making the rim around any cavity susceptible to undesirable etching or deposition. Thinner resist will produce extremely non-uniform coverage, and in most cases voiding such as shown at locations 16 indicated in FIG. 1. This voiding, located in the proximity of the cavities, leaves the surface of the substrate unprotected by the photoresist, rendering the lithography at the perimeter of the cavities ineffective.
This is a well documented problem. The most common technique employed to overcome this challenge is spray coating of the photoresist. Spray coating has several drawbacks. In order to build the most uniform coating as a thin film, the spray must be done as a mist. A fine mist is susceptible to drying into particulates, which present an entirely new set of problems. Therefore, there is a tradeoff between film thickness and cleanliness, and therefore the film thickness creates a limitation for the lithography. In addition, since the photoresist is a liquid, it will still flow and pile in the bottom of the cavities, which can cause other processing complications.
A second prior art method of addressing extreme topography is to apply multiple layers of photoresist. However, this only solves coverage on the rim. Resist non-uniformities continue to be problematic. Such resist non-uniformities affect the focal depth of the exposure tool and inherently impact the final feature resolution since some features are in focus while others are not. To maintain feature resolution and eliminate issues with focal depth, it is desirable to perform lithography with a uniform resist coating. A level imagining resist plane can be formed using a dry film laminate resist.
Manual techniques for applying beads of photoresist to the rim of the cavities to eliminate voiding have also been investigated. This technique is very costly and slow, and still does not enable images to be placed close to the perimeter of the cavity.
It would be highly desirable to provide a process that essentially planarizes a semiconductor substrate having an extreme topographic surface feature such as a deep cavity in order to create a planar surface for subsequent lithography processing. The planarizing materials may then be removed after lithography.
It would further be highly desirable to provide a process that essentially planarizes a semiconductor substrate having an extreme topographic surface feature such as a deep cavity in order to create a planar surface for subsequent lithography processing including the deposition of features in close proximity to the extreme topographic surface feature (e.g., deep cavity or channel) and, including the deposition of features within the cavity.